US 11,923,250 B2
Fin loss prevention
Hung-Ju Chou, Taipei (TW); Chih-Chung Chang, Nantou County (TW); Jiun-Ming Kuo, Taipei (TW); Che-Yuan Hsu, Hsinchu (TW); Pei-Ling Gao, Hsinchu (TW); and Chen-Hsuan Liao, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Jul. 28, 2022, as Appl. No. 17/875,466.
Application 17/875,466 is a division of application No. 16/787,906, filed on Feb. 11, 2020, granted, now 11,705,372.
Prior Publication US 2023/0008005 A1, Jan. 12, 2023
Int. Cl. H01L 21/8238 (2006.01); H01L 21/02 (2006.01); H01L 21/3065 (2006.01); H01L 27/092 (2006.01); H01L 29/04 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/161 (2006.01)
CPC H01L 21/823807 (2013.01) [H01L 21/02532 (2013.01); H01L 21/02609 (2013.01); H01L 21/3065 (2013.01); H01L 21/823821 (2013.01); H01L 21/823878 (2013.01); H01L 21/823892 (2013.01); H01L 27/0924 (2013.01); H01L 27/0928 (2013.01); H01L 29/045 (2013.01); H01L 29/0653 (2013.01); H01L 29/1054 (2013.01); H01L 29/1083 (2013.01); H01L 29/161 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
forming a p-doped region in a substrate;
forming an n-doped region in the substrate;
epitaxially growing a first semiconductor layer on the p-doped region;
epitaxially growing a second semiconductor layer different from the first semiconductor layer on the n-doped region;
epitaxially growing a capping layer on the first and second semiconductor layers;
etching the p-doped region, the first semiconductor layer, and a first portion of the capping layer on the p-doped region to form a first fin structure on the substrate;
etching the n-doped region, the second semiconductor layer, and a second portion of the capping layer on the n-doped region to form a second fin structure on the substrate; and
forming an isolation region between the first and second fin structures, wherein a top surface of the isolation region is coplanar with top surfaces of first and second semiconductor layers.