US 11,923,021 B2
Selection of read offset values in a memory sub-system based on temperature and time to program levels
Kishore Kumar Muchherla, Fremont, CA (US); Vamsi Pavan Rayaprolu, San Jose, CA (US); and Larry J. Koudele, Erie, CO (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jan. 5, 2023, as Appl. No. 18/093,646.
Application 18/093,646 is a continuation of application No. 17/014,583, filed on Sep. 8, 2020, granted, now 11,557,357.
Prior Publication US 2023/0141893 A1, May 11, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 7/04 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01); G11C 16/32 (2006.01); G11C 16/34 (2006.01)
CPC G11C 16/3459 (2013.01) [G11C 7/04 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 16/32 (2013.01); G11C 16/3404 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A method comprising:
receiving, by a processing device, a request to execute a read operation associated with data of a memory unit of a memory sub-system;
determining a time after program associated with the data;
determining a temperature level associated with the memory unit;
identifying, based on the time after program and the temperature level, a first threshold voltage offset bin of a plurality of threshold voltage offset bins, wherein the first threshold voltage offset bin comprises a set of read offset values to apply in executing the read operation; and
executing the read operation using the set of read offset values.