US 11,922,991 B2
Information processing apparatus, information processing system, and semiconductor storage device
Akihisa Fujimoto, Yamato (JP); and Atsushi Kondo, Yokohama (JP)
Assigned to KIOXIA CORPORATION, Tokyo (JP)
Filed by KIOXIA CORPORATION, Tokyo (JP)
Filed on Apr. 17, 2023, as Appl. No. 18/301,482.
Application 18/301,482 is a continuation of application No. 17/348,082, filed on Jun. 15, 2021, granted, now 11,664,066.
Application 17/348,082 is a continuation of application No. 16/817,832, filed on Mar. 13, 2020, granted, now 11,081,163, issued on Aug. 3, 2021.
Claims priority of application No. 2019-076690 (JP), filed on Apr. 12, 2019; and application No. 2019-157077 (JP), filed on Aug. 29, 2019.
Prior Publication US 2023/0253027 A1, Aug. 10, 2023
Int. Cl. G11C 5/14 (2006.01); G06F 3/06 (2006.01); G11C 7/22 (2006.01); G11C 11/4074 (2006.01); G11C 11/4076 (2006.01)
CPC G11C 11/4074 (2013.01) [G06F 3/0614 (2013.01); G06F 3/0653 (2013.01); G06F 3/0688 (2013.01); G11C 7/22 (2013.01); G11C 11/4076 (2013.01)] 10 Claims
OG exemplary drawing
 
1. An information processing system comprising a host device and a semiconductor storage device capable of being placed into the host device,
the semiconductor storage device being a second type semiconductor storage device operating with m types of power supply voltages supplied from outside, the m types of power supply voltages being less than n types of power supply voltages for a first-type semiconductor storage device, the first-type semiconductor storage device operating with the n types of power supply voltages supplied from outside, n being an integer of 2 or more, m being an integer of 1 or more and being less than n,
the host device being configured to:
check whether or not a predetermined condition is satisfied, when the host device is configured to supply the m types of power supply voltages to the second-type semiconductor storage device;
supply no power supply voltages to a semiconductor storage device placed into a connector of the host device, when the predetermined condition is not satisfied;
supply the m types of power supply voltages to the semiconductor storage device placed into the connector, when the predetermined condition is satisfied, and
when the predetermined condition is satisfied, supply a first signal to a terminal of the semiconductor storage device placed into the connector after a predetermined time elapses after supplying the m types of power supply voltages to the semiconductor storage device placed into the connector, the terminal being used to release a reset status of the semiconductor storage device placed into the connector, wherein
the second-type semiconductor storage device includes a plurality of power supply terminals, and a number of the plurality of power supply terminals is equal to a number of a plurality of power supply terminals included in the first-type semiconductor storage device,
the semiconductor storage device that is the second-type semiconductor storage device is configured to:
determine whether the host device into which the semiconductor storage device is placed is a first-type host device supplying the n types of power supply voltages or a second-type host device supplying the m types of power supply voltages, based on a voltage of a first power supply terminal and a voltage of a second power supply terminal, or the voltage of the first power supply terminal, the first power supply terminal and the second power supply terminal being included in the plurality of power supply terminals of the semiconductor storage device;
when the host device into which the semiconductor storage device is placed is the second-type host device, assert a clock request signal for the host device, the clock request signal being a signal that requests the host device to supply a reference clock signal; and
when the host device into which the semiconductor storage device is placed is the first-type host device, not assert the clock request signal for the host device or assert the clock request signal for the host device after changing settings of an internal circuit of the semiconductor storage device so as to generate plural types of power supply voltages necessary for an operation of the semiconductor storage device from the n types of power supply voltages supplied to the plurality of power supply terminals, wherein
the n types of power supply voltages include a first power supply voltage, a second power supply voltage lower than the first power supply voltage, and a third power supply voltage lower than the second power supply voltage,
the m types of power supply voltages include the first power supply voltage or the first power supply voltage and the second power supply voltage,
the first-type semiconductor storage device is configured to operate with three types of power supply voltages supplied from outside, and the second-type semiconductor storage device is configured to operate with one type of power supply voltage supplied from outside or two types of power supply voltages supplied from outside,
the first power supply terminal is a power supply terminal to which the third power supply voltage is assigned in the first-type semiconductor storage device and to which the first power supply voltage is assigned in the second-type semiconductor storage device, and
the second power supply terminal is a power supply terminal to which the second power supply voltage is assigned in the first-type semiconductor storage device and to which the first power supply voltage, the second power supply voltage, or 0V is assigned in the second-type semiconductor storage device.