US 11,922,883 B2
Pixel, organic light emitting display device using the same, and method of driving the organic light emitting display device
Jin Tae Jeong, Yongin-si (KR); Min Ku Lee, Yongin-si (KR); Ji Hyun Ka, Yongin-si (KR); Tae Hoon Kwon, Yongin-si (KR); Seung Kyu Lee, Yongin-si (KR); and Seung Ji Cha, Yongin-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed by SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed on Dec. 8, 2022, as Appl. No. 18/063,203.
Application 18/063,203 is a continuation of application No. 16/436,016, filed on Jun. 10, 2019, granted, now 11,710,455.
Application 16/436,016 is a continuation of application No. 15/601,012, filed on May 22, 2017, granted, now 10,319,306, issued on Jun. 11, 2019.
Claims priority of application No. 10-2016-0075520 (KR), filed on Jun. 17, 2016.
Prior Publication US 2023/0119752 A1, Apr. 20, 2023
Int. Cl. G09G 3/3258 (2016.01); G09G 3/3225 (2016.01); H10K 59/123 (2023.01)
CPC G09G 3/3258 (2013.01) [G09G 3/3225 (2013.01); H10K 59/123 (2023.02); G09G 2300/0819 (2013.01); G09G 2310/0216 (2013.01); G09G 2310/0251 (2013.01); G09G 2310/0262 (2013.01); G09G 2320/0214 (2013.01); G09G 2320/0238 (2013.01); G09G 2320/045 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A pixel comprising:
a driving transistor connected to a first node and having a gate electrode connected to a second node, the first node connected to a first power source;
a light emitting element connected between a third node and a second power source, the third node connected between the driving transistor and the light emitting element;
a first transistor connected between the third node and a first initializing power line to initialize a voltage of the third node;
a second transistor connected between a data line and the first node and having a gate electrode connected to a first scan line;
a third transistor connected between the gate electrode of the driving transistor and a second initializing power line to initialize a voltage of the gate electrode of the driving transistor;
a fourth transistor connected between the third node and the gate electrode of the driving transistor and having a gate electrode connected to the first scan line; and
a fifth transistor connected between the first node and the first power source and having a gate electrode connected to an emission control line,
wherein the second initializing power line has a voltage greater than a voltage of the first initializing power line, and
wherein:
a first signal is supplied through the first scan line;
a second signal is supplied through the emission control line;
the second transistor is turned on in response to the first signal enabled in a first time period; and
the fifth transistor is turned on in response to the second signal enabled in a second time period,
the second time period does not overlap the first time period.