US 11,922,877 B2
Display device enabling both high-frequency drive and low-frequency drive
Fumiyuki Kobayashi, Sakai (JP)
Assigned to SHARP KABUSHIKI KAISHA, Sakai (JP)
Appl. No. 18/014,767
Filed by Sharp Kabushiki Kaisha, Sakai (JP)
PCT Filed Jul. 22, 2020, PCT No. PCT/JP2020/028372
§ 371(c)(1), (2) Date Jan. 6, 2023,
PCT Pub. No. WO2022/018842, PCT Pub. Date Jan. 27, 2022.
Prior Publication US 2023/0298522 A1, Sep. 21, 2023
Int. Cl. G09G 3/3233 (2016.01); G09G 3/3258 (2016.01)
CPC G09G 3/3233 (2013.01) [G09G 3/3258 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A display device provided with a pixel circuit including a display element driven by a current, the display device comprising a display unit that includes
a plurality of the pixel circuits in a plurality of rows and a plurality of columns,
a plurality of data signal lines configured to supply data signals to pixel circuits in respective columns,
a plurality of scanning signal lines configured to control writing of the data signals into pixel circuits in respective rows,
a plurality of emission control lines configured to control whether to supply a current to the display element included in the pixel circuits in the respective rows,
a first power line configured to supply a high-level power supply voltage,
a second power line configured to supply a low-level power supply voltage, and
a reference power line configured to supply a reference voltage, wherein
the pixel circuit includes
a first control node,
a second control node,
the display element having a first terminal and having a second terminal connected to the second power line,
a first initialization transistor having a control terminal connected to one of the plurality of scanning signal lines, a first conductive terminal connected to the first power line, and a second conductive terminal connected to the first control node,
a threshold voltage compensation transistor having a control terminal connected to one of the plurality of scanning signal lines, a first conductive terminal connected to the first control node, and a second conductive terminal,
a write control transistor having a control terminal connected to one of the plurality of scanning signal lines, a first conductive terminal connected to one of the plurality of data signal lines, and a second conductive terminal connected to the second control node,
a drive transistor having a control terminal connected to the first control node, a first conductive terminal connected to the second conductive terminal of the threshold voltage compensation transistor, and the second conductive terminal connected to the first terminal of the display element,
a first emission control transistor having a control terminal connected to one of the plurality of emission control lines, a first conductive terminal connected to the first power line, and a second conductive terminal connected to the first conductive terminal of the drive transistor,
a second emission control transistor having a control terminal connected to one of the plurality of emission control line, a first conductive terminal connected to the second control node, and a second conductive terminal connected to the first terminal of the display element,
a second initialization transistor having a control terminal, a first conductive terminal connected to the first terminal of the display element, and a second conductive terminal connected to the reference power line, and
a holding capacitor having a first electrode connected to the first control node and a second electrode connected to the second control node, and
a channel layer of the first initialization transistor and a channel layer of the threshold voltage compensation transistor are each formed of an oxide semiconductor.