| CPC G09G 3/32 (2013.01) [G09G 2330/021 (2013.01)] | 2 Claims |
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1. A pixel driving circuit comprising:
a first circuit including a memory and a controller, and configured to control, in a data writing mode, a signal related to driving of one or more luminous elements; and
a second circuit including a driver and a bias unit, and configured to supply, in a driving mode, power to the one or more luminous elements based on a signal transmitted from the first circuit,
wherein the driver includes a capacitor configured to receive bias power from the bias unit and supply the bias power to the one or more luminous elements,
wherein the memory includes a first memory configured to store video data related to the driving of the one or more luminous elements and a second memory configured to store capacitor data related to charging of the capacitor,
wherein the controller outputs a control signal corresponding to the video data and the capacitor data,
wherein the controller controls whether to supply the bias power by the bias unit, by controlling the bias unit such that the bias unit supplies power to the capacitor only when the video data has a bit value of 1, and the bias unit stops supplying power when the capacitor is charged with the bias power,
wherein, when a number of times of charging is defined as K, the controller controls the bias unit such that bias power supply is performed at most K times within a single frame, and
wherein the number of times of charging is user-definable.
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