CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0673 (2013.01); G11C 7/1036 (2013.01); G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01)] | 20 Claims |
1. A storage device comprising:
a memory device; and
a memory controller configured to control the memory device and provide the memory device with a command,
wherein the memory device includes:
a memory unit; and
an interface chip configured to perform a training operation in response to the command by:
generating a shift signal corresponding to data stored in one of a plurality of first shift registers according to a first data strobe signal provided from the memory controller, and
storing, based on the shift signal, training data provided from the memory controller in one of a plurality of first storage registers.
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