US 11,922,022 B2
Method for transferring data on a memory card in synchronism with a rise edge and a fall edge of a clock signal
Takafumi Ito, Ome (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Minato-ku (JP)
Filed on Dec. 7, 2022, as Appl. No. 18/076,618.
Application 18/076,618 is a continuation of application No. 17/236,073, filed on Apr. 21, 2021, granted, now 11,550,478.
Application 17/236,073 is a continuation of application No. 16/906,006, filed on Jun. 19, 2020, granted, now 11,016,672, issued on May 25, 2021.
Application 16/906,006 is a continuation of application No. 16/232,114, filed on Dec. 26, 2018, granted, now 10,732,850, issued on Aug. 4, 2020.
Application 16/232,114 is a continuation of application No. 15/816,767, filed on Nov. 17, 2017, granted, now 10,198,191, issued on Feb. 5, 2019.
Application 15/816,767 is a continuation of application No. 15/263,950, filed on Sep. 13, 2016, granted, now 9,857,991, issued on Jan. 2, 2018.
Application 15/263,950 is a continuation of application No. 14/508,380, filed on Oct. 7, 2014, granted, now 9,465,545, issued on Oct. 11, 2016.
Application 14/508,380 is a continuation of application No. 13/005,910, filed on Jan. 13, 2011, granted, now 8,924,678, issued on Dec. 30, 2014.
Application 13/005,910 is a continuation of application No. 12/351,889, filed on Jan. 12, 2009, granted, now 7,890,729, issued on Feb. 15, 2011.
Application 12/351,889 is a continuation of application No. 11/476,853, filed on Jun. 29, 2006, granted, now 7,831,794, issued on Nov. 9, 2010.
Claims priority of application No. 2005-193002 (JP), filed on Jun. 30, 2005.
Prior Publication US 2023/0106495 A1, Apr. 6, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/06 (2006.01); G06F 12/14 (2006.01); G06F 13/42 (2006.01); G11C 7/22 (2006.01)
CPC G06F 3/0611 (2013.01) [G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G06F 12/1433 (2013.01); G06F 13/4234 (2013.01); G11C 7/22 (2013.01); G06F 3/0673 (2013.01); G06F 2206/1014 (2013.01)] 30 Claims
OG exemplary drawing
 
1. A method of controlling a storage device including a command terminal; a plurality of data terminals; a clock terminal; a power terminal for a power supply voltage; a ground terminal for a ground voltage; a nonvolatile memory,
the method comprising:
receiving a clock signal through the clock terminal from an outside of the storage device;
outputting a first status data through at least one of the data terminals to the outside of the storage device, in accordance with only one of a rising edge and a falling edge of the clock signal, in a first transfer mode;
outputting data through at least one of the data terminals to the outside of the storage device, in accordance with both the rising edge and the falling edge of the clock signal, in a second transfer mode; and
receiving and responding to commands via the command terminal in accordance with only one of a rising edge and a falling edge of the clock signal while outputting data through at least one of the data terminals to the outside of the storage device in accordance with both the rising edge and the falling edge of the clock signal, in the second transfer mode.