CPC G06F 13/4072 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0658 (2013.01); G06F 3/0679 (2013.01); G06F 18/214 (2023.01)] | 20 Claims |
1. A storage device comprising:
first non-volatile memory devices;
second non-volatile memory devices;
a buffer chip configured to connect to the first non-volatile memory devices through a first internal channel and to connect to the second non-volatile memory devices through a second internal channel; and
a controller configured to connect to the buffer chip through a channel,
wherein the buffer chip includes:
a channel selector configured to select one of the first internal channel and the second internal channel in response to a selection signal and to connect the selected internal channel to the channel;
a chip enable signal decoder configured to receive at least one chip enable signal and to generate the selection signal; and
a test circuit configured to check whether retraining of unselected internal channel excluding the selected internal channel is required while the selected internal channel is used for an execution of a normal operation and to transmit information on whether the retraining is required to the controller.
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