US 11,921,561 B2
Neural network inference circuit employing dynamic memory sleep
Jung Ko, San Jose, CA (US); Kenneth Duong, San Jose, CA (US); and Steven L. Teig, Menlo Park, CA (US)
Assigned to PERCEIVE CORPORATION, San Jose, CA (US)
Filed by Perceive Corporation, San Jose, CA (US)
Filed on May 27, 2022, as Appl. No. 17/827,625.
Application 17/827,625 is a continuation of application No. 16/427,302, filed on May 30, 2019, granted, now 11,347,297.
Claims priority of provisional application 62/798,364, filed on Jan. 29, 2019.
Claims priority of provisional application 62/796,029, filed on Jan. 23, 2019.
Prior Publication US 2022/0291739 A1, Sep. 15, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 1/32 (2019.01); G06F 1/3287 (2019.01)
CPC G06F 1/3287 (2013.01) 20 Claims
OG exemplary drawing
 
1. For a sleep control circuit for a memory unit of a neural network inference circuit configured to execute a neural network, a method comprising:
determining a value indicating a length of time since the memory unit was last accessed, wherein the memory unit stores neural network weight data that is loaded onto the memory unit when the neural network inference circuit is booted up, the weight data for use each time the neural network inference circuit executes the neural network; and
when the determined value is at least a threshold value, sending a signal to the memory unit to operate in a sleep mode that is a power-saving mode of operation that maintains the neural network weight data stored in the memory unit.