US 11,921,421 B2
Overlay correcting method, and photolithography method, semiconductor device manufacturing method and scanner system based on the overlay correcting method
Jeongjin Lee, Hwaseong-si (KR); Minseok Kang, Hwaseong-si (KR); Seungyoon Lee, Seoul (KR); and Chan Hwang, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Dec. 6, 2022, as Appl. No. 18/062,231.
Application 18/062,231 is a continuation of application No. 16/807,734, filed on Mar. 3, 2020, granted, now 11,537,042.
Claims priority of application No. 10-2019-0083433 (KR), filed on Jul. 10, 2019.
Prior Publication US 2023/0095808 A1, Mar. 30, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G03F 1/70 (2012.01); G03F 7/20 (2006.01); G06F 17/18 (2006.01); H01L 21/66 (2006.01)
CPC G03F 1/70 (2013.01) [G03F 7/2004 (2013.01); G06F 17/18 (2013.01); H01L 22/12 (2013.01)] 5 Claims
OG exemplary drawing
 
1. A scanner system comprising:
a correction parameter calculation device configured to calculate correction parameters of an overlay by regularized regression; and
a scanner configured to perform a photolithography process on an object to be patterned, based on the correction parameters, wherein the regularized regression is based on a correction limit of the scanner.