	US 11,921,382 B2
	Liquid crystal display device, semiconductor device, and electronic appliance
Hajime Kimura, Kanagawa (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed by Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed on Apr. 19, 2023, as Appl. No. 18/136,367.
Application 18/136,367 is a continuation of application No. 17/901,973, filed on Sep. 2, 2022, granted, now 11,644,720.
Application 17/901,973 is a continuation of application No. 17/381,429, filed on Jul. 21, 2021, granted, now 11,442,317, issued on Sep. 13, 2022.
Application 17/381,429 is a continuation of application No. 16/888,906, filed on Jun. 1, 2020, granted, now 11,073,729, issued on Jul. 27, 2021.
Application 16/888,906 is a continuation of application No. 15/963,150, filed on Apr. 26, 2018, granted, now 10,684,517, issued on Jun. 16, 2020.
Application 15/963,150 is a continuation of application No. 14/957,746, filed on Dec. 3, 2015, granted, now 9,958,736, issued on May 1, 2018.
Application 14/957,746 is a continuation of application No. 12/904,537, filed on Oct. 14, 2010, granted, now 9,207,504, issued on Dec. 8, 2015.
Application 12/904,537 is a continuation of application No. 11/695,898, filed on Apr. 3, 2007, granted, now 9,213,206, issued on Dec. 15, 2015.
Claims priority of application No. 2006-105618 (JP), filed on Apr. 6, 2006.
Prior Publication US 2023/0258986 A1, Aug. 17, 2023
Int. Cl. G02F 1/1343 (2006.01); G02F 1/1333 (2006.01); G02F 1/1335 (2006.01); G02F 1/1337 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); H01L 27/12 (2006.01); H01L 29/786 (2006.01)

CPC G02F 1/134309 (2013.01) [G02F 1/133345 (2013.01); G02F 1/133514 (2013.01); G02F 1/1337 (2013.01); G02F 1/134363 (2013.01); G02F 1/13439 (2013.01); G02F 1/136213 (2013.01); G02F 1/136286 (2013.01); G02F 1/1368 (2013.01); H01L 27/1225 (2013.01); H01L 27/124 (2013.01); H01L 27/1255 (2013.01); H01L 29/7869 (2013.01); H01L 29/78696 (2013.01); G02F 1/1362 (2013.01); H01L 2924/0002 (2013.01)]

2 Claims

2. A semiconductor device comprising:

a first transistor;

a second transistor;

a capacitor;

a first pixel electrode; and

a second pixel electrode,

wherein one of a source and a drain of the first transistor is electrically connected to the first pixel electrode and the capacitor,

wherein one of a source and a drain of the second transistor is electrically connected to the second pixel electrode,

wherein the other of the source and the drain of the first transistor is electrically connected to a source line,

wherein the other of the source and the drain of the second transistor is electrically connected to the source line,

wherein a gate line comprises a region serving as a gate of the second transistor,

wherein a wiring comprises a first region and a second region,

wherein the gate line and the first region extend along the same direction,

wherein the second region has a width larger than a width of the first region,

wherein the second region is configured to be one electrode of the capacitor,

wherein a first conductive layer and the wiring overlap with each other,

wherein the first conductive layer and the gate line overlap with each other,

wherein the first conductive layer and a second conductive layer overlap with each other,

wherein the wiring is electrically connected to the second conductive layer through the first conductive layer,

wherein the second conductive layer and the second pixel electrode overlap with each other,

wherein the first conductive layer comprises the same material with the source line,

wherein the first conductive layer and the first pixel electrode do not overlap with each other, and

wherein the first conductive layer and the second pixel electrode do not overlap with each other.