US 7,334,150 K1 (3,465th)
	Memory module with a clock signal regeneration circuit and a register circuit for temporarily storing the incoming command and address signals
Hermann Ruckerbauer; Abdallah Bacha; Christian Sichert; Dominique Savignac; Peter Gregorius; and Paul Wallner
Assigned to POLARIS INNOVATIONS LIMITED
Trial No. IPR2017-00116, Oct. 24, 2016
Inter Partes Review Certificate for Patent 7,334,150, issued Feb. 19, 2008, Appl. No. 11/002,148, Dec. 3, 2004
Inter Partes Review Certificate issued Feb. 28, 2024