| CPC H10D 30/6713 (2025.01) [H10D 30/6729 (2025.01); H10D 64/018 (2025.01)] | 20 Claims |
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1. A semiconductor device, comprising:
an active pattern including a lower pattern and sheet patterns, the sheet patterns being spaced apart from the lower pattern in a first direction;
a source/drain pattern on the lower pattern, the source/drain pattern being in contact with the sheet patterns; and
gate structures on opposite sides of the source/drain pattern, the gate structures being spaced apart from each other along a second direction and including gate electrodes that surround the sheet patterns,
wherein the source/drain pattern includes:
a first epitaxial region including first impurities, which include at least one of antimony and bismuth, the first epitaxial region having a bottom part in contact with the lower pattern, but not with the sheet patterns, and with respect to the second direction away from the gate structures, a thickness of the bottom part increases and then decreases, and
a second epitaxial region on the first epitaxial region, the second epitaxial region including second impurities, which include phosphorus.
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