US 12,245,438 B2
Dense piers for three-dimensional memory arrays
Stephen W. Russell, Boise, ID (US); Enrico Varesi, Milan (IT); David H. Wells, Boise, ID (US); Paolo Fantini, Vimercate (IT); and Lorenzo Fratin, Buccinasco (IT)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Mar. 24, 2022, as Appl. No. 17/656,287.
Prior Publication US 2023/0309326 A1, Sep. 28, 2023
Int. Cl. H01L 27/24 (2006.01); H01L 45/00 (2006.01); H10B 63/00 (2023.01); H10N 70/00 (2023.01)
CPC H10B 63/845 (2023.02) [H10N 70/066 (2023.02)] 11 Claims
OG exemplary drawing
 
1. A method, comprising:
depositing a stack of layers over a substrate, the stack of layers comprising alternating layers of a first material and a second material, wherein the first material comprises a dielectric material;
forming a plurality of piers through the stack of layers based at least in part on forming a first plurality of cavities through the stack of layers and filling the first plurality of cavities with a third material, wherein the third material comprises a second dielectric material, and wherein each of the alternating layers of the first material and the second material is in contact with each pier of the plurality of piers;
forming a plurality of first word lines and a plurality of second word lines based at least in part on removing the second material to form an interleaved pair of comb structures comprising the first material and a first plurality of voids, and depositing a fourth material in the first plurality of voids;
forming a second plurality of cavities through the stack of layers, wherein a sidewall of each cavity of the second plurality of cavities is in contact with a sidewall of a respective pier of the plurality of piers;
forming a plurality of pillars in the second plurality of cavities;
forming a third plurality of cavities between the plurality of pillars based at least in part on removing at least some of the piers of the plurality of piers, each cavity of the third plurality of cavities exposing a respective first sidewall of a pillar of the plurality of pillars;
forming a plurality of memory cells based at least in part on depositing a memory material in each cavity of the third plurality of cavities, each memory cell of the plurality of memory cells coupled between a pillar of the plurality of pillars and a word line of the plurality of first word lines or the plurality of second word lines; and
forming a plurality of dielectric portions based at least in part on depositing a fourth dielectric material in each cavity of the third plurality of cavities.