US 12,245,425 B2
Three dimensional memory device containing resonant tunneling barrier and high mobility channel and method of making thereof
Peter Rabkin, Cupertino, CA (US); and Masaaki Higashitani, Cupertino, CA (US)
Assigned to Sandisk Technologies, Inc., Milpitas, CA (US)
Filed by SANDISK TECHNOLOGIES LLC, Addison, TX (US)
Filed on Feb. 16, 2022, as Appl. No. 17/673,137.
Application 17/673,137 is a continuation in part of application No. 17/534,528, filed on Nov. 24, 2021, granted, now 12,016,179.
Prior Publication US 2023/0164990 A1, May 25, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H10B 41/27 (2023.01); H01L 29/15 (2006.01); H10B 41/10 (2023.01); H10B 41/35 (2023.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01)
CPC H10B 41/27 (2023.02) [H01L 29/151 (2013.01); H10B 41/10 (2023.02); H10B 41/35 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02)] 8 Claims
OG exemplary drawing
 
7. A three-dimensional memory device comprises a plurality of levels of memory elements, comprising:
a memory film comprising a layer stack that includes a resonant tunneling barrier stack, a semiconductor barrier layer, and a memory material layer located between the resonant tunneling barrier stack and the semiconductor barrier layer;
a semiconductor channel; and
a control gate electrode;
wherein:
the resonant tunneling barrier stack is located between the memory material layer and the semiconductor channel; and
the semiconductor barrier layer is located between the memory material layer and the control gate electrode.