US 12,245,422 B2
Semiconductor device and a method making the same
Shibing Qian, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by ChangXin Memory Technologies, Inc., Hefei (CN)
Filed on Jun. 1, 2022, as Appl. No. 17/830,159.
Claims priority of application No. 202110975447.0 (CN), filed on Aug. 24, 2021.
Prior Publication US 2023/0061462 A1, Mar. 2, 2023
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/485 (2023.02) [H10B 12/053 (2023.02); H10B 12/34 (2023.02)] 15 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a substrate, comprising word lines formed at intervals on the substrate, wherein a trench is formed between two adjacent ones of the word lines;
a bit line contact layer, wherein a bottom surface of the bit line contact layer is in contact with a bottom surface of the trench, and wherein the bit line contact layer comprises non-planar contact portions on a top surface away from the bottom surface of the trench; and
a conductive layer, wherein the conductive layer is in contact connection with the non-planar contact portions of the bit line contact layer, wherein
the non-planar contact portions have at least two grooves arranged at intervals, and wherein the depths of the at least two grooves are different in a direction perpendicular to a surface of the substrate.