| CPC H10B 12/312 (2023.02) [H10B 12/03 (2023.02); H10B 12/482 (2023.02); H10B 12/488 (2023.02)] | 13 Claims |

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1. A method for preparing a memory device, comprising:
forming a first bottom cell within a bottom substrate, comprising: forming a first bottom capacitor within the bottom substrate; forming a first bottom word line on the bottom substrate and extending along a first direction; and forming a first bottom channel layer surrounded by the first bottom word line;
forming a first top cell within a top substrate, comprising: forming a first top capacitor within the top substrate; forming a first top word line on the top substrate and extending along the first direction; and forming a first top channel layer surrounded by the first top word line;
forming a common bit line between the first bottom cell and the first top cell and extending along a second direction substantially perpendicular to the first direction, wherein the first bottom channel layer and the first top channel layer are separated from each other by the common bit line between the first bottom cell and the first top cell.
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