CPC H04W 72/1273 (2013.01) [H04W 72/0446 (2013.01); H04W 72/23 (2023.01); H04W 76/30 (2018.02)] | 30 Claims |
1. An apparatus for wireless communications at a user equipment (UE), comprising:
one or more processors; and
one or more memories coupled with the one or more processors, wherein the one or more memories comprise instructions executable by the one or more processors to cause the apparatus to:
receive control signaling indicating a semi-persistent scheduling configuration that schedules a burst of multiple downlink shared channel transmission opportunities to receive multiple separate downlink signals within a time interval of the semi-persistent scheduling configuration, wherein a respective downlink shared channel transmission opportunity of the multiple downlink shared channel transmission opportunities is scheduled for a respective downlink signal of the multiple separate downlink signals; and
receive a downlink signal via a downlink shared channel transmission opportunity of the multiple downlink shared channel transmission opportunities in accordance with the semi-persistent scheduling configuration.
|