| CPC H04N 25/79 (2023.01) [H04N 25/616 (2023.01); H04N 25/772 (2023.01)] | 22 Claims |
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1. An imaging element comprising:
a first substrate on which are located
a first pixel including a first photoelectric converter that converts light into an electric charge;
a second pixel including a second photoelectric converter that converts light into an electric charge and is arranged in line with the first photoelectric converter in a row direction; and
a third pixel including a third photoelectric converter that converts light into an electric charge and is arranged in line with the first photoelectric converter in a column direction;
a wiring layer in which are located
a first signal line that is electrically connected to the first pixel and to which a first signal is output based on the electric charge converted in the first photoelectric converter;
a second signal line that is electrically connected to the second pixel and to which a second signal is output based on the electric charge converted in the second photoelectric converter; and
a third signal line that is electrically connected to the third pixel and to which a third signal is output based on the electric charge converted in the third photoelectric converter; and
a second substrate that is stacked together with the first substrate and on which are located
a first supply unit that supplies a first voltage to the first signal line;
a second supply unit that supplies a second voltage to the second signal line;
a third supply unit that supplies a third voltage to the third signal line;
a first processing unit that performs signal processing on the first signal output to the first signal line;
a second processing unit that performs signal processing on the second signal output to the second signal line;
a third processing unit that performs signal processing on the third signal output to the third signal line;
a first pixel controller for reading out the first signal from the first pixel to the first signal line;
a second pixel controller for reading out the second signal from the second pixel to the second signal line;
a third pixel controller for reading out the third signal from the third pixel to the third signal line;
a first control unit that controls such that the first voltage is supplied from the first supply unit to the first signal line when the first signal is read out from the first pixel to the first signal line by the first pixel controller;
a second control unit that controls such that the second voltage is supplied from the second supply unit to the second signal line when the second signal is read out from the second pixel to the second signal line by the second pixel controller; and
a third control unit that controls such that the third voltage is supplied from the third supply unit to the third signal line when the third signal is read out from the third pixel to the third signal line by the third pixel controller, wherein
the wiring layer is located between the first substrate and the second substrate in a stacking direction in which the first substrate and the second substrate are stacked.
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