US 12,244,954 B2
Semiconductor device
Hyeokjong Lee, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Nov. 21, 2022, as Appl. No. 18/057,252.
Claims priority of application No. 10-2021-0165731 (KR), filed on Nov. 26, 2021; and application No. 10-2022-0071735 (KR), filed on Jun. 13, 2022.
Prior Publication US 2023/0171523 A1, Jun. 1, 2023
Int. Cl. H04N 25/78 (2023.01); H01L 27/146 (2006.01); H04N 25/616 (2023.01); H04N 25/771 (2023.01)
CPC H04N 25/78 (2023.01) [H01L 27/14643 (2013.01); H04N 25/616 (2023.01); H04N 25/771 (2023.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first counter latch circuit configured to receive a count code and to latch the count code according to a comparison result signal; and
a second counter latch circuit configured to receive the count code from the first counter latch circuit, and to latch the count code by using a plurality of first latches,
wherein the plurality of first latches are coupled in series to each other and are configured to operate to sequentially bypass values transmitted to the respective plurality of first latches.