US 12,244,331 B2
Differential input receiver circuit testing with a loopback circuit
Kumar Abhishek, Bee Cave, TX (US); Srikanth Jagannathan, Austin, TX (US); and Frederic Benoist, Saint Paul de Vence (FR)
Assigned to NXP USA, Inc., Austin, TX (US)
Filed by NXP USA, Inc., Austin, TX (US)
Filed on Jul. 20, 2022, as Appl. No. 17/813,774.
Claims priority of application No. 21306051 (EP), filed on Jul. 28, 2021.
Prior Publication US 2023/0033973 A1, Feb. 2, 2023
Int. Cl. H04B 1/10 (2006.01); G01R 31/28 (2006.01); G01R 31/317 (2006.01); H03F 3/45 (2006.01); H04B 1/16 (2006.01); H04L 25/02 (2006.01)
CPC H04B 1/10 (2013.01) [H03F 3/45493 (2013.01); H04B 1/1607 (2013.01); H04L 25/0272 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit device comprising:
a low voltage differential signaling (LVDS) receiver that includes:
a receiver circuit including a first input coupled to a first conductive pad, a second input coupled to a second conductive pad, and an output coupled to an input of a digital controller;
a dummy transmitter circuit including a first input coupled to receive a common mode voltage (VCM) tune signal, a second input coupled to a loopback input signal, a third input coupled to a loopback enable signal, a first output coupled to the first input of the receiver circuit, and a second output coupled to the second input of the receiver circuit; and
when a test mode of operation is enabled, the digital controller asserts the loopback enable signal, and the dummy transmitter circuit generates a pair of test differential signals based on the loopback input signal and the VCM tune signal, wherein the VCM tune signal varies to test the LVDS receiver over a range of common mode voltages.