US 12,244,321 B2
Hybrid analog/digital circuit for solving nonlinear programming problems
Jason Poon, Palo Alto, CA (US)
Assigned to The Board of Trustees of the Leland Stanford Junior University, Stanford, CA (US)
Appl. No. 18/271,451
Filed by The Board of Trustees of the Leland Stanford Junior University Office of the General Counsel, Stanford, CA (US)
PCT Filed Jan. 29, 2022, PCT No. PCT/US2022/014463
§ 371(c)(1), (2) Date Jul. 8, 2023,
PCT Pub. No. WO2022/165287, PCT Pub. Date Aug. 4, 2022.
Claims priority of provisional application 63/143,856, filed on Jan. 30, 2021.
Prior Publication US 2024/0056089 A1, Feb. 15, 2024
Int. Cl. H03M 1/06 (2006.01); G06F 17/10 (2006.01); G06F 17/11 (2006.01); H03M 1/12 (2006.01)
CPC H03M 1/0614 (2013.01) [G06F 17/10 (2013.01); G06F 17/11 (2013.01); H03M 1/12 (2013.01)] 3 Claims
OG exemplary drawing
 
1. An electronic circuit comprising:
(a) an analog circuit that physically realizes a nonlinear programming problem (NLP) wherein voltages in the analog circuit represent variables in the NLP, and the interconnection of the analog circuit components enforce Karush-Kuhn-Tucker (KKT) conditions on the variables, such that the voltages in the analog circuit that represent the variables of the NLP naturally converge to an optimal and feasible solution of the NLP;
(b) a digital microcontroller connected to nodes of the analog circuit;
(c) an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC) that interconnect the analog circuit with the digital microcontroller; wherein the digital microcontroller sets the voltages in the analog circuit at particular nodes in the analog circuit through the DAC, wherein the voltages set at the particular nodes determine a precise cost function to be minimized by the analog circuit, wherein the voltages set at the particular nodes are computed by the digital microcontroller based on measurements obtained from the analog circuit through the ADC.