US 12,244,315 B2
Systems and methods for real-time frequency shift detection via a nested-MEMS architecture
Duane Younkin, Ashburnham, MA (US); Ronald Joseph Lipka, Northborough, MA (US); Ryan Hennessy, Northborough, MA (US); Diego Emilio Serrano, Alpharetta, GA (US); Chihchuan Che, Northborough, MA (US); Amir Rahafrooz, Shaker Heights, OH (US); and Mohammad Maymandi Nejad, Hopkinton, MA (US)
Assigned to PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD., Osaka (JP)
Filed by Panasonic Intellectual Property Management Co., Ltd., Osaka (JP)
Filed on Jan. 3, 2023, as Appl. No. 18/149,275.
Prior Publication US 2024/0223169 A1, Jul. 4, 2024
Int. Cl. H03K 5/00 (2006.01); H03K 21/02 (2006.01); H03L 1/02 (2006.01); H03L 7/083 (2006.01)
CPC H03K 5/00006 (2013.01) [H03K 21/02 (2013.01); H03L 1/02 (2013.01); H03L 7/083 (2013.01); H03K 2005/00286 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A correction circuit, comprising:
frequency division circuitry that is configured to receive a reference signal;
drive circuitry that is configured to receive and condition the reference signal from the frequency division circuitry;
a first resonator that is configured to receive the reference signal from the drive circuitry;
sense circuitry that is configured to receive the reference signal from the first resonator;
phase detector circuitry that is configured to generate at least one output signal based on receipt of a plurality of input signals from the drive circuitry and the sense circuitry; and
a proportional integral derivative controller that is configured to generate a temperature correction signal to correct frequency error in an oscillator based on receipt of the at least one output signal from the phase detector circuitry.