US 12,244,312 B2
Low noise ring oscillator devices and methods
Yung-Shun Chen, Taoyuan (TW); Amit Kundu, Hsinchu (TW); and Yung-Chow Peng, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Hsinchu (TW)
Filed on Apr. 6, 2023, as Appl. No. 18/296,629.
Claims priority of provisional application 63/386,086, filed on Dec. 5, 2022.
Prior Publication US 2024/0186989 A1, Jun. 6, 2024
Int. Cl. H03K 3/03 (2006.01); H03K 5/134 (2014.01); H03K 19/0185 (2006.01)
CPC H03K 3/0315 (2013.01) [H03K 5/134 (2014.07); H03K 19/018521 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device, comprising:
delay cells connected in series and in a feedback loop to provide a ring oscillator,
wherein at least one of the delay cells in the ring oscillator is a stacked gate delay cell that includes:
two or more PMOS transistors having first drain/source paths connected in series to each other and having first gates connected to each other; and
two or more NMOS transistors having second drain/source paths connected in series to each other and to the first drain/source paths and having second gates connected to each other and to the first gates, and
wherein the stacked gate delay cell includes a first number of PMOS transistors and a second number of NMOS transistors, such that the first number is different than the second number.