US 12,244,276 B2
Power amplifier circuit
Naofumi Takezono, Kyoto (JP); and Masashi Maruyama, Kyoto (JP)
Assigned to MURATA MANUFACTURING CO., LTD., Kyoto (JP)
Filed by Murata Manufacturing Co., Ltd., Kyoto (JP)
Filed on Mar. 24, 2022, as Appl. No. 17/656,284.
Claims priority of application No. 2021-053332 (JP), filed on Mar. 26, 2021.
Prior Publication US 2022/0311394 A1, Sep. 29, 2022
Int. Cl. H03F 1/30 (2006.01); H03F 3/24 (2006.01)
CPC H03F 3/245 (2013.01) [H03F 2200/451 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A power amplifier circuit comprising:
an amplifier transistor configured to amplify a radio-frequency signal and to output an amplified radio-frequency signal; and
a bias circuit configured to supply a bias current to a base of the amplifier transistor, the bias circuit comprising:
a bias current supply transistor, and
an electrostatic capacity circuit whose electrostatic capacity varies in accordance with a temperature of the amplifier transistor, that is configured to charge during a non-supply period during which the bias current is not supplied, and that is configured to discharge to a bias current supply path during a supply period during which the bias current is supplied,
wherein the supply period during which the bias current is supplied includes an amplification period during which the radio-frequency signal is amplified by the amplifier transistor, and
wherein the supply period begins before the amplification period begins.