US 12,244,223 B2
Control circuit of power factor improvement circuit and semiconductor integrated circuit device
Satoshi Maejima, Kyoto (JP); and Takumi Fujimaki, Kyoto (JP)
Assigned to Rohm Co., Ltd., Kyoto (JP)
Filed by ROHM CO., LTD., Kyoto (JP)
Filed on May 5, 2023, as Appl. No. 18/312,807.
Application 18/312,807 is a division of application No. 17/491,883, filed on Oct. 1, 2021, granted, now 11,705,807.
Claims priority of application No. 2020-168299 (JP), filed on Oct. 5, 2020; and application No. 2020-169303 (JP), filed on Oct. 6, 2020.
Prior Publication US 2023/0275507 A1, Aug. 31, 2023
Int. Cl. H02M 1/42 (2007.01); H02M 1/08 (2006.01); H02M 1/32 (2007.01); H05B 45/345 (2020.01); H05B 45/355 (2020.01); H05B 45/3725 (2020.01)
CPC H02M 1/4208 (2013.01) [H02M 1/08 (2013.01); H02M 1/32 (2013.01); H05B 45/345 (2020.01); H05B 45/355 (2020.01); H05B 45/3725 (2020.01)] 7 Claims
OG exemplary drawing
 
1. A semiconductor integrated circuit device having a terminal configured to be applied with a power supply voltage, comprising:
an anomaly detection circuit configured to detect anomaly;
an output stop circuit configured to stop an output of the semiconductor integrated circuit device when anomaly is detected by the anomaly detection circuit;
a suppression circuit configured to suppress current consumption of the semiconductor integrated circuit device when anomaly is detected by the anomaly detection circuit;
an overvoltage detection circuit configured to detect the power supply voltage is an overvoltage; and
a current drawing circuit configured to draw a current from the terminal when the overvoltage of the power supply voltage is detected by the overvoltage detection circuit.