US 12,243,939 B2
Laterally diffused metal-oxide semiconductor (LDMOS) transistor with integrated back-gate
Gang Xue, San Jose, CA (US); Pushpa Mahalingam, Richardson, TX (US); and Alexei Sadovnikov, Sunnyvale, CA (US)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Oct. 31, 2021, as Appl. No. 17/515,531.
Prior Publication US 2023/0136827 A1, May 4, 2023
Int. Cl. H01L 29/78 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/7816 (2013.01) [H01L 29/42368 (2013.01); H01L 29/456 (2013.01); H01L 29/66681 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
a semiconductor substrate having a first conductivity;
a drain region having a second conductivity in the semiconductor substrate, the drain region extending in a first direction;
a first gate insulating layer on the drain region extending in the first direction;
a first gate on the first gate insulating layer, the first gate extending in the first direction;
a second gate insulating layer extending in the first direction on the drain region, the second gate insulating layer separated from the first gate insulating layer by a gate gap;
a second gate on the second gate insulating layer, the second gate extending in the first direction and separated from the first gate by the gate gap;
a first drain having the second conductivity in the drain region extending in the first direction and on an opposite side of the first gate from the gate gap;
a second drain having the second conductivity in the drain region extending in the first direction and on an opposite side of the second gate from the gate gap;
a channel well having the first conductivity in the drain region at the gate gap, the channel well extending in the first direction and extending in a second direction perpendicular to the first direction under the first gate and the second gate;
a first source having the first conductivity formed in the channel adjacent to an edge of the first gate, the first source comprising a first source contact, and the first source extending in the first direction;
a second source having the first conductivity formed in the channel adjacent to an edge of the second gate, the second source comprising a second source contact, and the second source extending in the first direction and separated from the first source by a channel gap;
at least one back-gate contact formed in the channel well between the first gate and the second gate, the at least one back-gate contact overlying the first source and the second source, and separated from the first gate by a first back-gate contact gap defined by a top surface of the first source contact coplanar with a top surface of the at least one back-gate contact and separated from the second gate by a second back-gate contact gap defined by a top surface of the second source contact coplanar with the top surface of the at least one back-gate contact;
the first and second source contacts formed in the channel well in the gate gap except at the at least one back-gate contact; and
a conductive layer formed in contact with the at least one back-gate contact, the first source contact and the second source contact.