US 12,243,924 B2
Gate structure with non-linear profile for transistors
Chih Ping Wang, Hsinchu (TW); Chao-Cheng Chen, Hsinchu (TW); Jr-Jung Lin, Hsinchu (TW); and Chi-Wei Yang, Taoyuan (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Mar. 13, 2023, as Appl. No. 18/182,928.
Application 16/992,899 is a division of application No. 15/920,866, filed on Mar. 14, 2018, granted, now 10,749,007, issued on Aug. 18, 2020.
Application 18/182,928 is a continuation of application No. 16/992,899, filed on Aug. 13, 2020, granted, now 11,605,719.
Prior Publication US 2023/0223453 A1, Jul. 13, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/423 (2006.01); H01L 21/3213 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/42376 (2013.01) [H01L 21/32135 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 29/7851 (2013.01); H01L 29/41791 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a substrate;
an isolation layer on the substrate;
a protrusion extending above a topmost surface of the isolation layer;
a gate electrode extending over the protrusion and along respective sidewalls of the protrusion, the gate electrode including an upper portion extending above a topmost surface of the protrusion, the upper portion having a linear profile and a first width when viewed in cross-section, the gate electrode further having a lower portion extending along a sidewall of the protrusion, the lower portion having a non-linear concave profile and a second width less than the first width when viewed in cross-section; and
a gate spacer layer extending along an outer surface of the gate electrode from a top of the gate electrode to a bottom of the gate electrode, the gate spacer layer having a profile that is conformal to the profile of the gate electrode and having a uniform width from a top of the gate electrode to a bottom of the gate electrode.