CPC H01L 29/4236 (2013.01) [H01L 29/0847 (2013.01); H01L 29/1079 (2013.01)] | 17 Claims |
1. A structure comprising:
a substrate;
a field-effect transistor including a first gate having a first sidewall, a second gate having a second sidewall adjacent to the first sidewall, a first gate extension having a first section adjoined to the first sidewall and a second section adjoined to the second sidewall, a second gate extension having a first section adjoined to the first sidewall and a second section adjoined to the second sidewall, a source region in the substrate between the first sidewall and the second sidewall, and a drain region in the substrate;
a dielectric layer over the field-effect transistor;
a first gate contact in the dielectric layer, the first gate contact in contact with the first section of the first gate extension;
a second gate contact in the dielectric layer, the second gate contact in contact with the first section of the second gate extension; and
a third gate contact in the dielectric layer, the third gate contact in contact with the second section of the first gate extension,
wherein the first section of the first gate extension has a width dimension that decreases with increasing distance from the first sidewall, the second section of the first gate extension has a width dimension that decreases with increasing distance from the second sidewall, and the first section of the second gate extension has a width dimension that decreases with increasing distance from the first sidewall.
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