| CPC H01L 28/91 (2013.01) [H01L 28/40 (2013.01); H01L 28/60 (2013.01); H01L 28/75 (2013.01); H01L 28/86 (2013.01); H01L 28/90 (2013.01); H10B 12/03 (2023.02)] | 20 Claims |

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1. A semiconductor device, comprising:
an etch stop layer;
a first dielectric layer on the etch stop layer;
a contact feature disposed completely in the first dielectric layer and on the etch stop layer;
a first passivation layer over the contact feature;
a bottom conductor plate layer over the first passivation layer, the bottom conductor plate layer comprising a first plurality of sublayers;
a second dielectric layer over the bottom conductor plate layer;
a middle conductor plate layer over the second dielectric layer, the middle conductor plate layer comprising a second plurality of sublayers;
a third dielectric layer over the middle conductor plate layer;
a top conductor plate layer over the third dielectric layer, the top conductor plate layer comprising a third plurality of sublayers;
a second passivation layer over the top conductor plate layer;
a first conductive feature extending through and electrically coupled to the middle conductor plate layer and the top conductor plate layer;
a second conductive feature extending through and electrically coupled to the top conductor plate layer and the middle conductor plate layer; and
a third conductive feature extending through and electrically coupled to the top conductor plate layer and the bottom conductor plate layer.
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