US 12,243,871 B2
Integrated circuits with capacitors
Hsiao-Han Liu, Miaoli County (TW); Hoppy Lee, Hsinchu (TW); Chung-Yu Chiang, Changhua County (TW); Po-Nien Chen, Miaoli County (TW); and Chih-Yung Lin, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed on Feb. 20, 2023, as Appl. No. 18/171,530.
Application 18/171,530 is a continuation of application No. 17/114,108, filed on Dec. 7, 2020, granted, now 11,587,790.
Application 17/114,108 is a continuation of application No. 16/183,113, filed on Nov. 7, 2018, granted, now 10,861,928, issued on Dec. 8, 2020.
Claims priority of provisional application 62/732,877, filed on Sep. 18, 2018.
Prior Publication US 2023/0207320 A1, Jun. 29, 2023
Int. Cl. H01L 27/07 (2006.01); H01L 21/033 (2006.01); H01L 21/768 (2006.01); H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 49/02 (2006.01)
CPC H01L 27/0733 (2013.01) [H01L 21/0337 (2013.01); H01L 21/76829 (2013.01); H01L 21/823431 (2013.01); H01L 21/823468 (2013.01); H01L 21/823481 (2013.01); H01L 28/60 (2013.01); H01L 29/66545 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a first fin disposed on a substrate;
a first source/drain feature disposed on the first fin;
an isolation structure disposed on the substrate, the isolation structure having a side surface facing the first source/drain feature and a top surface facing away from the substrate;
a dielectric isolation material disposed on the substrate and interfacing with the first fin and the isolation structure; and
a first electrode disposed on and interfacing with the first source/drain feature, the side surface of the isolation structure, the top surface of the isolation structure and the dielectric isolation material.