| CPC H01L 23/5283 (2013.01) [H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H01L 23/528 (2013.01)] | 5 Claims |
|
1. A method of manufacturing a semiconductor device,
wherein the method comprises forming a front-end-of-line (FEOL) structure, and forming a back-end-of-line (BEOL) structure connected to the FEOL structure, and
wherein the forming the BEOL structure comprises:
forming a plurality of metal patterns having a same width on a base layer such that the plurality of metal patterns are disposed at a predetermined pitch;
forming a spacer layer along outer surfaces of the plurality of metal patterns so that the spacer layer has a same thickness along the outer surfaces of the plurality of metal patterns;
removing the spacer layer from top surfaces of the plurality of metal patterns such that the spacer layer remains as a plurality of spacers on side surfaces of the plurality of metal patterns;
removing at least one of the plurality of metal patterns as a target metal pattern;
forming a metal layer along outer surfaces of various patterns including target spacers, among the plurality of spacers, that remain after the target metal pattern between the target spacers are removed, and the other metal patterns with the other spacers on side surfaces thereof, so that the metal layer has a same thickness along the various patterns;
removing the metal layer at top surfaces of the various patterns, and leaving the metal layer at side surfaces of the plurality of spacers including the target spacers; and
removing the plurality of spacers including the target spacers, thereby obtaining a plurality of fine metal lines from the metal layer remaining between the plurality of spacers, and obtaining a plurality of wide metal lines from the plurality of metal patterns remaining between the plurality of spacers.
|