US 12,243,810 B2
Semiconductor package with wettable flank and related methods
Hui Min Ler, Seremban (MY); Soon Wei Wang, Seremban (MY); and Chee Hiong Chew, Seremban (MY)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US)
Filed on Nov. 16, 2022, as Appl. No. 18/056,100.
Application 18/056,100 is a division of application No. 17/136,136, filed on Dec. 29, 2020, granted, now 11,532,539.
Prior Publication US 2023/0073773 A1, Mar. 9, 2023
Int. Cl. H01L 23/495 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 21/78 (2006.01); H01L 23/31 (2006.01)
CPC H01L 23/49541 (2013.01) [H01L 21/4825 (2013.01); H01L 21/4828 (2013.01); H01L 21/565 (2013.01); H01L 21/78 (2013.01); H01L 23/3107 (2013.01); H01L 23/49503 (2013.01); H01L 23/49524 (2013.01); H01L 23/49575 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of forming a semiconductor package comprising:
providing a lead frame encompassed by an outer frame, the lead frame comprising a plurality of leads, one or more die flags, and a plurality of tie bars directly coupled between the plurality of leads and the outer frame;
half-etching the plurality of tie bars;
at least partially encapsulating the lead frame in a mold compound;
exposing an end of each lead of the plurality of leads through removing a first side of the outer frame from the lead frame;
electroplating an end of each lead of the plurality of leads through the plurality of tie bars;
singulating the lead frame from the outer frame.