| CPC H01L 21/823878 (2013.01) [H01L 21/823821 (2013.01); H01L 27/0924 (2013.01)] | 20 Claims |

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1. A device comprising:
a first semiconductor fin extending from a substrate;
a second semiconductor fin extending from the substrate;
a hybrid fin over the substrate, the hybrid fin disposed between the first semiconductor fin and the second semiconductor fin, the hybrid fin having an oxide inner portion extending downward from a top surface of the hybrid fin;
a first isolation region between the second semiconductor fin, the first semiconductor fin, and the hybrid fin, the hybrid fin extending above a top surface of the first isolation region;
a high-k gate dielectric over sidewalls of the hybrid fin, sidewalls of the first semiconductor fin, and sidewalls of the second semiconductor fin, wherein the first semiconductor fin includes an interfacial oxide layer between sidewalls of the first semiconductor fin and the high-k gate dielectric;
a gate electrode on the high-k gate dielectric; and
source/drain regions on the first semiconductor fin on opposing sides of the gate electrode.
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