| CPC H01L 21/823431 (2013.01) [H01L 21/823807 (2013.01); H01L 21/823814 (2013.01); H01L 21/823828 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/6653 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 29/66795 (2013.01); H01L 29/7848 (2013.01); H01L 29/78696 (2013.01); H01L 21/02603 (2013.01); H01L 27/0922 (2013.01); H01L 29/66742 (2013.01); H01L 29/78618 (2013.01)] | 20 Claims |

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1. A method for forming a semiconductor device structure, comprising:
forming a multilayer structure over a substrate having a base;
forming a gate stack over the substrate, wherein the gate stack wraps around the multilayer structure;
partially removing the multilayer structure, which is not covered by the gate stack, wherein the multilayer structure remaining under the gate stack forms a multilayer stack, and the multilayer stack comprises a first sacrificial layer and a first channel layer over the first sacrificial layer;
partially removing the first sacrificial layer to form a first recess in the multilayer stack;
forming an inner spacer layer in the first recess and a bottom spacer over a first sidewall of the first channel layer, wherein the inner spacer layer and the bottom spacer are made of different materials; and
forming a source/drain structure over the bottom spacer, wherein the bottom spacer separates the source/drain structure from the first channel layer, and the source/drain structure partially extends into the bottom spacer.
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