US 12,243,775 B2
Double patterning approach by direct metal etch
Hsi-Wen Tien, Xinfeng Township (TW); Wei-Hao Liao, Taichung (TW); Yu-Teng Dai, New Taipei (TW); Hsin-Chieh Yao, Hsinchu (TW); Chih-Wei Lu, Hsinchu (TW); and Chung-Ju Lee, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jan. 27, 2023, as Appl. No. 18/160,793.
Application 18/160,793 is a continuation of application No. 17/192,573, filed on Mar. 4, 2021, granted, now 11,569,127.
Prior Publication US 2023/0170254 A1, Jun. 1, 2023
Int. Cl. H01L 21/768 (2006.01); H01L 21/3213 (2006.01)
CPC H01L 21/76877 (2013.01) [H01L 21/32136 (2013.01); H01L 21/32139 (2013.01); H01L 21/76834 (2013.01); H01L 21/7684 (2013.01); H01L 21/76885 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
forming a plurality of first metal patterns in one or more metal layers, wherein adjacent ones of the plurality of first metal patterns are spaced apart from each other with a corresponding one of a plurality of recesses, wherein the plurality of recesses are configured to expose respective portions of a dielectric layer disposed beneath the first metal patterns; and
filling the plurality of recesses with a conductive material to form a plurality of second metal patterns in the plurality of recesses, respectively;
wherein each of the plurality of first metal patterns includes two layers of metal materials.