US 12,243,773 B2
Liner and barrier layer in dual damascene cu interconnect for enhanced EM and process
Zhaosheng Meng, Qingdao (CN); Zhuangzhuang Wu, Qingdao (CN); and Min-Hwa Chi, Qingdao (CN)
Assigned to SiEn (QingDao) Integrated Circuits Co., Ltd., Qingdao (CN)
Filed by SiEn (QingDao) Integrated Circuits Co., Ltd., Shandong (CN)
Filed on Dec. 28, 2021, as Appl. No. 17/563,347.
Claims priority of application No. 202110005987.6 (CN), filed on Jan. 5, 2021.
Prior Publication US 2022/0216101 A1, Jul. 7, 2022
Int. Cl. H01L 23/48 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01)
CPC H01L 21/76846 (2013.01) [H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H01L 23/53238 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A copper (Cu) interconnect, forming in a through hole and a groove of a dielectric layer on a substrate, wherein the Cu interconnect comprises a barrier layer forming at a sidewall and a bottom of the through hole and a sidewall and a bottom of the groove and a Cu interconnecting line forming on the barrier layer and filling the through hole and groove, the barrier layer comprises a metal crystal adhesion layer, a first barrier layer is formed between the metal crystal adhesion layer the through hole and the groove, an amorphous metal pad layer is formed between the metal crystal adhesion layer and the first barrier layer, and the metal crystal adhesion layer is cobalt (Co) crystal layer, ruthenium (Ru) crystal layer or osmium (Os) crystal layer.