US 12,243,771 B2
Selective patterning of vias with hardmasks
John C. Arnold, North Chatham, NY (US); Ashim Dutta, Clifton Park, NY (US); Dominik Metzler, Clifton Park, NY (US); Timothy M. Philip, Albany, NY (US); and Sagarika Mukesh, Albany, NY (US)
Assigned to INTERATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed by INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed on Feb. 8, 2022, as Appl. No. 17/666,767.
Application 17/666,767 is a division of application No. 16/570,059, filed on Sep. 13, 2019, granted, now 11,276,607.
Prior Publication US 2022/0165612 A1, May 26, 2022
Int. Cl. H01L 21/768 (2006.01); H01L 21/033 (2006.01); H01L 23/522 (2006.01)
CPC H01L 21/76816 (2013.01) [H01L 21/0332 (2013.01); H01L 21/0337 (2013.01); H01L 21/76883 (2013.01); H01L 21/76897 (2013.01); H01L 23/5226 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a first metal line having a planar upper surface across its width colinearly disposed relative to a second metal structure in a same layer, wherein the first metal line includes a single line end that a subtractively etched self-aligned via is positioned on adjacent to a line cut region, wherein the subtractively etched self-aligned via is etched from the first metal line and the subtractively etched self-aligned via and the first metal line share a vertical boundary at an end portion of the first metal line facing towards the second metal structure.