US 12,243,748 B2
FinFET device having a gate with a tapering bottom portion and a gate fill material with a widening bottom portion
Shih-Yao Lin, New Taipei (TW); Kuei-Yu Kao, Hsinchu (TW); Chih-Han Lin, Hsinchu (TW); Ming-Ching Chang, Hsinchu (TW); and Chao-Cheng Chen, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 20, 2022, as Appl. No. 17/869,057.
Application 17/869,057 is a division of application No. 16/811,079, filed on Mar. 6, 2020, granted, now 11,482,421.
Claims priority of provisional application 62/927,577, filed on Oct. 29, 2019.
Prior Publication US 2022/0359207 A1, Nov. 10, 2022
Int. Cl. H01L 27/088 (2006.01); H01L 21/28 (2006.01); H01L 21/762 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 21/28141 (2013.01) [H01L 21/76224 (2013.01); H01L 21/823431 (2013.01); H01L 21/823437 (2013.01); H01L 21/823468 (2013.01); H01L 27/0886 (2013.01); H01L 29/0653 (2013.01); H01L 29/4238 (2013.01); H01L 29/6653 (2013.01); H01L 29/66545 (2013.01); H01L 29/6656 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 29/7851 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a fin protruding above a substrate;
isolation regions on opposing sides of the fin;
a gate structure over the fin;
gate spacers along sidewalls of the gate structure; and
a gate fill material between the gate structure and the gate spacers, wherein a distance, measured between opposing sidewalls of the gate fill material facing the gate structure, decreases as the gate fill material extends toward the isolation regions, wherein the gate fill material comprises:
a first portion over an upper surface of the fin distal from the substrate, wherein a first thickness of the first portion remains a same as the first portion extends from an upper surface of the gate spacers to the upper surface of the fin; and
a second portion below the upper surface of the fin, wherein a second thickness of the second portion increases as the second portion extends toward the isolation regions.
 
9. A semiconductor device comprising:
isolation regions over a substrate;
a fin protruding above the isolation regions;
a gate structure over the fin, wherein an upper portion of the gate structure has a uniform thickness, and a lower portion of the gate structure tapers off as the lower portion of the gate structure extends toward the isolation regions;
gate spacers along sidewalls of the gate structure; and
a gate fill material between and contacting the gate structure and the gate spacers, wherein a thickness of the gate fill material increases as the gate fill material extends toward the isolation regions.
 
17. A semiconductor device comprising:
isolation regions over a substrate;
a fin between the isolation regions and protruding above the isolation regions;
a gate structure over the fin, wherein a lower portion of the gate structure extends into the isolation regions;
gate spacers on opposing sides of the gate structure; and
a gate fill material between the gate structure and the gate spacers, wherein the gate fill material comprises an upper portion distal from the isolation regions and a lower portion contacting the isolation regions, wherein the upper portion of the gate fill material has a uniform thickness, and the lower portion of the gate fill material has a thickness that increases as the gate fill material extends toward the isolation regions.