US 12,243,739 B2
Semiconductor wafer and method for manufacturing same
Yuki Taketomi, Tokyo (JP); Kohei Miki, Tokyo (JP); and Shinichi Miyakuni, Tokyo (JP)
Assigned to Mitsubishi Electric Corporation, Tokyo (JP)
Appl. No. 17/625,084
Filed by Mitsubishi Electric Corporation, Tokyo (JP)
PCT Filed Oct. 23, 2019, PCT No. PCT/JP2019/041534
§ 371(c)(1), (2) Date Jan. 5, 2022,
PCT Pub. No. WO2021/079434, PCT Pub. Date Apr. 29, 2021.
Prior Publication US 2022/0290327 A1, Sep. 15, 2022
Int. Cl. C30B 29/40 (2006.01); C23C 16/04 (2006.01); C23C 16/30 (2006.01); C23C 16/34 (2006.01); C23C 16/50 (2006.01); C30B 23/04 (2006.01); C30B 25/04 (2006.01); H01L 21/02 (2006.01)
CPC H01L 21/02002 (2013.01) [C23C 16/042 (2013.01); C23C 16/303 (2013.01); C23C 16/345 (2013.01); C23C 16/50 (2013.01); C30B 23/04 (2013.01); C30B 25/04 (2013.01); C30B 29/406 (2013.01); H01L 21/02381 (2013.01); H01L 21/02433 (2013.01); H01L 21/0254 (2013.01); H01L 21/02639 (2013.01); H01L 21/02664 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A semiconductor wafer comprising:
a silicon substrate;
a gallium nitride growth layer provided on an upper surface of the silicon substrate and divided into a plurality of small sections; and
an insulating layer provided on the upper surface of the silicon substrate, the insulating layer filling portions between the plurality of small sections, wherein
the insulating layer exerts stress to the silicon substrate in a direction opposite to a direction in which the gallium nitride growth layer exerts stress on the silicon substrate,
the insulating layer includes a silicon nitride film,
a plurality of convex silicon portions are formed on a side of the upper surface of the silicon substrate, and
the plurality of small sections are provided on the plurality of convex silicon portions.
 
5. A semiconductor wafer comprising:
a silicon substrate;
a gallium nitride growth layer provided on an upper surface of the silicon substrate and divided into a plurality of small sections; and
an insulating layer provided on the upper surface of the silicon substrate, the insulating layer filling portions between the plurality of small sections, wherein
the insulating layer exerts stress to the silicon substrate in a direction opposite to a direction in which the gallium nitride growth layer exerts stress on the silicon substrate,
the insulating layer includes a silicon nitride film, and
concave portions are formed in the insulating layer between pairs of small sections adjacent to each other among the plurality of small sections.