US 12,243,616 B2
Memory device for supporting stable data transfer and memory system including the same
Hyeon Uk Lee, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Jan. 26, 2023, as Appl. No. 18/159,685.
Claims priority of application No. 10-2022-0111249 (KR), filed on Sep. 2, 2022.
Prior Publication US 2024/0079037 A1, Mar. 7, 2024
Int. Cl. G11C 7/10 (2006.01); G11C 29/52 (2006.01)
CPC G11C 7/1057 (2013.01) [G11C 7/1045 (2013.01); G11C 7/1084 (2013.01); G11C 29/52 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A memory device comprising:
a memory region configured to store data;
an operation control unit configured to determine a toggling reference cycle and a toggling reference count for a first interval, configured to determine whether an error has occurred in a toggling input cycle and input count of an external control signal that is applied from an outside, in order to control a data input/output operation for the memory region based on the toggling reference cycle and the toggling reference count for a second interval subsequent to the first interval, and configured to determine whether an input defense mode has been entered based on a result of the error determination; and
an operation execution unit configured to perform a set operation in response to the external control signal for the second interval and configured to perform, when the input defense mode has been entered, a defense operation that is predefined in the input defense mode in response to an output signal of the operation control unit.