| CPC G11C 5/06 (2013.01) [H01L 23/5283 (2013.01); H01L 25/165 (2013.01)] | 20 Claims |

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1. A memory system comprising:
a first wiring board having a first interconnection, a second interconnection, and a first side surface;
a second wiring board having a third interconnection, a fourth interconnection, and a second side surface;
a first projecting part and a second projecting part provided at one of the first side surface and the second side surface, respectively;
a first recessed part and a second recessed part provided at the other of the first side surface and the second side surface, respectively;
a memory mounted on the first wiring board and electrically connected to the first interconnection and the second interconnection; and
a memory controller mounted on the second wiring board and electrically connected to the third interconnection and the fourth interconnection, wherein
the first projecting part is connected to one of the first interconnection and the third interconnection,
the second projecting part is connected to one of the second interconnection and the fourth interconnection,
the first recessed part is connected to the other of the first interconnection and the third interconnection,
the second recessed part is connected to the other of the second interconnection and the fourth interconnection,
the first projecting part is engaged with the first recessed part to electrically connect the memory to the memory controller via the first interconnection and the third interconnection, and
the second projecting part is engaged with the second recessed part to electrically connect the memory to the memory controller via the second interconnection and the fourth interconnection.
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