CPC G11C 29/021 (2013.01) [G11C 5/144 (2013.01); G11C 29/028 (2013.01)] | 20 Claims |
1. A memory system, comprising:
one or more memory devices;
processing circuitry coupled with the one or more memory devices, the processing circuitry configured to be coupled with a host device, receive one or more commands from the host device, and access the one or more memory devices based at least in part on the one or more commands; and
a voltage detector circuit coupled with the one or more memory devices and configured to monitor one or more supply voltages of the one or more memory devices and determine whether the one or more supply voltages satisfy a first threshold of the voltage detector circuit and a second threshold of the voltage detector circuit based at least in part on monitoring the one or more supply voltages, wherein the first threshold and the second threshold correspond to an operational range of the one or more memory devices.
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