| CPC G11C 11/4091 (2013.01) [H01L 25/0657 (2013.01); H01L 25/18 (2013.01)] | 20 Claims |

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1. An apparatus, comprising:
a pull-up sense amplifier comprising P-type fin field effect transistors (FinFETs) having a first threshold voltage potential associated therewith;
a pull-down sense amplifier comprising N-type FinFETs having a second threshold voltage potential associated therewith, the second threshold voltage potential substantially equal to the first threshold voltage potential;
column select gates;
global input-output (GIO) lines electrically connected to the pull-up sense amplifier and the pull-down sense amplifier through the column select gates;
GIO pre-charge circuitry configured to pre-charge the GIO lines to a low power supply voltage potential;
local input/output (LIO) lines; and
LIO circuitry configured to pre-charge the LIO lines to a pre-charge voltage potential substantially halfway between the low power supply voltage potential and a high power supply voltage potential.
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