| CPC G09G 3/3696 (2013.01) [G02F 1/133308 (2013.01); G02F 1/134345 (2021.01); G02F 1/136286 (2013.01); H02M 7/537 (2013.01); H03F 3/45475 (2013.01); G09G 2310/0243 (2013.01); G09G 2310/0291 (2013.01); G09G 2320/0252 (2013.01)] | 20 Claims |

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1. An array substrate having a display area and a bonding region located at a side of the display area; the display area including gate lines extending in a first direction and arranged in a second direction, the first direction intersecting the second direction; the bonding region corresponding to a first region, the first region extending in the first direction; the array substrate further having a second region, a third region and a fourth region, the second region extending in the first direction; the first region and the second region being opposite in the second direction, and the third region and the fourth region being opposite in the first direction; the display area being located between the first region and the second region and between the third region and the fourth region; the display area including a distal region away from the bonding region, a proximal region proximate to the bonding region, and a middle region located between the distal region and the proximal region; the array substrate comprising:
a base;
a common electrode disposed on the base and located in the display area;
at least one first common signal line disposed on the base; the at least one first common signal line being disposed in the third region and/or the fourth region; the at least one first common signal line being coupled to the common electrode;
at least one second common signal line disposed on the base, the at least one second common signal line being disposed in the third region and/or the fourth region; the at least one second common signal line being coupled to the common electrode;
a connecting lead disposed in the second region; the at least one first common signal line being coupled to the connecting lead; and
a conductive frame, at least part of the conductive frame being located in the second region; the connecting lead and the common electrode being coupled to the conductive frame, so that the at least one first common signal line is coupled to the common electrode through the connecting lead and the conductive frame; wherein
the connecting lead includes at least two connecting lines, and the at least two connecting lines are coupled to the conductive frame.
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