US 12,242,966 B2
Acceleration of model/weight programming in memristor crossbar arrays
Sai Rahul Chalamalasetti, Milpitas, CA (US); Paolo Faraboschi, Sant Cugat (ES); Martin Foltin, Fort Collins, CO (US); Catherine Graves, Milpitas, CA (US); Dejan S. Milojicic, Palo Alto, CA (US); John Paul Strachan, San Carlos, CA (US); and Sergey Serebryakov, Saint-Petersburg (RU)
Assigned to Hewlett Packard Enterprise Development LP, Spring, TX (US)
Filed by Hewlett Packard Enterprise Development LP, Spring, TX (US)
Filed on Dec. 5, 2023, as Appl. No. 18/528,935.
Application 18/528,935 is a continuation of application No. 17/044,633, granted, now 11,853,846, previously published as PCT/US2018/030219, filed on Apr. 30, 2018.
Prior Publication US 2024/0112029 A1, Apr. 4, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 7/00 (2006.01); G06N 3/08 (2023.01); G11C 13/00 (2006.01)
CPC G06N 3/08 (2013.01) [G11C 13/0069 (2013.01); G11C 2213/77 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memristive dot product system for vector processing, comprising:
a crossbar array having a number of memory elements;
a vector output register comprising outputs from the crossbar array;
a comparator processor operatively connected to the vector output register, the comparator processor configured to:
compare output vector data from the vector output register to input vector data from a memory register;
determine changed data values as between the output vector data and the input vector data; and
write the changed data values to the memory elements of the crossbar array.