US 12,242,950 B2
Neural network circuit, edge device and neural network operation process
Koumei Tomida, Tokyo (JP); and Nikolay Nez, Tokyo (JP)
Assigned to LeapMind Inc., Tokyo (JP)
Filed by LeapMind Inc., Tokyo (JP)
Filed on Apr. 12, 2021, as Appl. No. 17/227,785.
Claims priority of application No. 2020-071932 (JP), filed on Apr. 13, 2020.
Prior Publication US 2021/0319294 A1, Oct. 14, 2021
Int. Cl. G06N 3/04 (2023.01); G06N 3/063 (2023.01)
CPC G06N 3/063 (2013.01) [G06N 3/04 (2013.01)] 5 Claims
OG exemplary drawing
 
1. A neural network circuit comprising:
a first memory unit that stores input data;
a convolution operation circuit that performs a convolution operation on a weight and the input data stored in the first memory unit,
a second memory unit that stores convolution operation output data from the convolution operation circuit; and
a quantization operation circuit that performs a quantization operation on the convolution operation output data stored in the second memory unit; wherein
the first memory unit stores a quantization operation output data from the quantization operation circuit:
the convolution operation circuit performs the convolution operation on the quantization operation output data stored in the first memory unit as the input data; and
the first memory unit, the convolution operation circuit, the second memory unit, and the convolution operation circuit form a loop,
wherein:
the input data is decomposed into a first partial tensor and a second partial tensor; and
the convolution operation on the first partial tensor in the convolution operation circuit and the quantization operation on the second partial tensor in the quantization operation circuit are performed in parallel.