US 12,242,852 B2
Look-up table initialize
Naveen Bhoria, Plano, TX (US); Dheera Balasubramanian Samudrala, Richardson, TX (US); Duc Bui, Grand Prairie, TX (US); and Rama Venkatasubramanian, Plano, TX (US)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Jul. 17, 2023, as Appl. No. 18/353,170.
Application 18/353,170 is a continuation of application No. 17/577,482, filed on Jan. 18, 2022, granted, now 11,709,677.
Application 17/577,482 is a continuation of application No. 16/570,778, filed on Sep. 13, 2019, granted, now 11,226,822, issued on Jan. 18, 2022.
Claims priority of provisional application 62/853,120, filed on May 27, 2019.
Prior Publication US 2023/0359462 A1, Nov. 9, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/445 (2018.01); G06F 12/02 (2006.01); G06F 16/31 (2019.01); G06F 16/41 (2019.01); G06F 16/901 (2019.01); G11C 11/409 (2006.01); G06F 3/06 (2006.01); G06F 9/355 (2018.01); G06F 12/0811 (2016.01)
CPC G06F 9/30145 (2013.01) [G06F 9/30007 (2013.01); G06F 9/3001 (2013.01); G06F 9/30032 (2013.01); G06F 9/30043 (2013.01); G06F 9/30101 (2013.01); G06F 9/30105 (2013.01); G06F 9/3818 (2013.01); G06F 9/44505 (2013.01); G06F 12/0246 (2013.01); G06F 12/0292 (2013.01); G06F 16/322 (2019.01); G06F 16/41 (2019.01); G06F 16/9017 (2019.01); G11C 11/409 (2013.01); G06F 3/0647 (2013.01); G06F 9/30167 (2013.01); G06F 9/355 (2013.01); G06F 12/0811 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
an instruction memory configured to store an instruction that specifies a set of tables, an index associated with the set of tables, and a set of data;
a cache; and
a processor coupled to the instruction memory and to the cache and configured to, in response to the instruction,
provide the set of data to the cache;
cause the cache to duplicate the set of data; and
cause the cache to store a respective copy of the set of data to a respective subset of each table of the set of tables, wherein the respective subset is based on the index specified by the instruction.