| CPC G06F 8/65 (2013.01) [G06F 21/64 (2013.01)] | 20 Claims |

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1. A device comprising:
a non-transitory memory storage comprising:
a first firmware stored in a first position of the non-transitory memory storage and a second firmware stored in a second position of the non-transitory memory storage, wherein each of the first firmware and the second firmware comprises instructions, wherein, in response to executing the instructions, the device is configured to perform an operation, and
a first delta copy associated with the first firmware, wherein the first delta copy includes position-dependent instructions that differ between the first firmware and the second firmware, wherein the position-dependent instructions in the first delta copy, corresponding to specific positions in the non-transitory memory storage, differ from instructions in the first firmware in response to being executed at the first position, and are the same as instructions of the first firmware in response to being executed at the second position; and
a processor in communication with the non-transitory memory storage, wherein the processor is configured to:
receive the first delta copy from an external system,
store the first delta copy in the non-transitory memory storage,
initiate a field upgrade process in response to receiving an external command,
receive and store an instruction part and a delta part as part of the field upgrade process,
set a post-upgrade flag upon completion of the field upgrade process,
copy an internal copy of an upgraded firmware to one or more other firmware instances in response to detecting the post-upgrade flag is set, and
replace position-dependent instructions of the one or more other firmware instances based on the stored delta part.
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